PEEPLNK

CCRID Product Title
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AVSREQ-147780 SIM_CAPTURE_REPLAY XMREPLAY warning "RPLNRCV" msg is misleading
AVSREQ-153316 DEBUG_DESIGN_DATABASE VHDL generics other than int type are not displayed in design exploration LWD mode - correct in snapshot mode
AVSREQ-162724 LP_1801 net splitting is not supported on inputs ports with -location self
AVSREQ-154555 MSIE_ELAB xmelab: *E,VIFUCOM even with -msielock oopr_to_interface
AVSREQ-158130 RAND_GENERAL Irrelevant RNDXZW flagged with "const static logic" identifier
AVSREQ-160605 GLS_PERFORMANCE Build time optimization option "-nocellaccess -nolibcell" causing simulation internal exception error
AVSREQ-161107 GLS_TIMING xmsim: *F,INTERR, when "-simtfile sim_tfile.txt" is applied.
AVSREQ-99986 SIMVISION_SCHEMATIC double click on net in schematic tracer zooms off to greater beyond
AVSREQ-149466 SIM_PERFORMANCE always block is only sometimes executed.
AVSREQ-154841 FUNC_SAFETY_CONCURRENT RTL block pruning error
AVSREQ-156467 SAVE_RESTART_CHECKPOINT (PBSR) simulation not restarting when both -cds_alternate_dir and -cds_implicit_dir are specified
AVSREQ-163300 PARSE_PERF Xmvlog time very high for small 111 config
AVSREQ-137397 XPROPAGATION_GENERAL Unexpected X when VHDL records XPROP enabled.
AVSREQ-151939 LP_SIM_PERF Detailed verbose functionality needs be default OFF with create_supply_net with strong
AVSREQ-157095 VHDL_GENERAL Event on VHDL record does not trigger a wait statement
AVSREQ-155452 SV_GENERAL Queue find_index method shows degradation to search index for queue of queues
AVSREQ-155512 ELAB_PERF Improve Xcelium build time
AVSREQ-158620 SV_DPI xmsim *F,INTERR using $stacktrace
AVSREQ-152544 PARSE_SV E*:UNILPA with use localparam, but adding integer to localparam disables the error
AVSREQ-157208 CORE_RAND Iteration timeout on contradicting constraint
AVSREQ-160301 DMS_AXUM umask 002 in amsConnectLibCompile and amsDmsLibCompile leaves some files group-writable
AVSREQ-155766 LP_1801 LPVASRT error is seen during elaboration while dumping the coverage with lps_cov option
AVSREQ-162415 SV_PERFORMANCE -enable_tb_o6 cause UVM_ERROR in 21.09.v002.RC2
AVSREQ-155800 HAL checking (halcheck: *F,HALSIG)
AVSREQ-82499 SIMVISION_SIGNAL_TRACING Schematic tracer issue with SV interface
AVSREQ-160242 SIM_PERFORMANCE *F,INTERR EXCEPTION - sv_seghandler - trapno -1 addr(0x17b02e)
AVSREQ-153480 COVERAGE_GENERAL xmelab INTERR in newer software seen when debugging AVSREQ-150855
AVSREQ-156883 ELAB_PERF Xcelium elab performance degradation in latest versions 21.03
AVSREQ-161045 LP_1801 Elab fails with *F,INTERR: INTERNAL EXCEPTION error , when ran with Low Power UPF
AVSREQ-157424 GLS_TIMING Xcelium21.03.007 elaboration crash (part2)
AVSREQ-144761 SIM_SV E,MEM13 despite correct memory bounds in memory load
AVSREQ-151683 COVERAGE_SIMULATION Coverage Performance in Xcelium
AVSREQ-146225 LP_1801 find_objects seems to be broken in define_power_model context
AVSREQ-165854 SIM_PERFORMANCE tl_prune_reader - index not found for reg
AVSREQ-156380 LP_1801 Floating nwell/pwell pg_pins not connected when -lps_aux_floating_pgaon used
AVSREQ-159240 RAND_GENERAL Drastic change in distribution with Xcelium Constraint Solver
AVSREQ-139777 VHDL_PERFORMANCE 60% performance gap on customer testcase vs SNPS
AVSREQ-164852 LP_SV X-prop failure on one element of a large array
AVSREQ-154475 SAVE_RESTART_CHECKPOINT MTCP Error: Overlapping addresses for older and newer
AVSREQ-157419 SIM_PERFORMANCE Xmelab crash pointing to function - cuv_create_net when tested with PSC_OPT
AVSREQ-131294 RAND_SOLVER Randomization native support for $clog2
AVSREQ-158932 ASSERTION_COMPILE *E,LVINIT Error Resolution/Workaround needed.
AVSREQ-154625 GLS_TIMING xmsim internal error when selecting DUT in Design Browser
AVSREQ-154725 SV_INTERFACE Nested unpacked structs as clocking object type not support, CUCITS error given
AVSREQ-149591 LP_1801 Improve performance of find_objects
AVSREQ-156406 ASSERTION_COMPILE *F,INTERR: INTERNAL EXCEPTION: xut_walk_e_tree: unhandled vst type, class 524
AVSREQ-156800 SPECMAN_TEMPORAL all of for each crash with OS signal 11 during runtime
AVSREQ-152873 GLS_TIMING Xcelium Simulation crash: Anonymous continuous assignment
AVSREQ-156899 LP_1801 Elaboration crash for Modem MSS-CSM environment sv_seghandler -trapno -1 addr(0x8)
AVSREQ-162030 SIM_PERFORMANCE always_ff behaviour w/ and w/o disable_clk_prune
AVSREQ-125638 SPECMAN_TEMPORAL OS Signal 11 error in 'first of for' with complex 'wait true' expression
AVSREQ-150200 LP_1801 Update for vector part select for upf_generic_output and upf_generic_pre_iso
AVSREQ-157142 DMS_MSIE xmelab INTERR with MSIE
AVSREQ-143578 PARSE_SV SVFWET - unsupported forward declaration of enum type (-enable_fwd_enum and -enable_use_before_decl_in_class)
AVSREQ-150958 SIM_PERFORMANCE Performance issue with locking/unlocking snapshot directory
AVSREQ-153576 LP_1801 remove lps_rsdrv from lps_common_options until thoroughly tested
AVSREQ-148819 FUNC_SAFETY_XFSG The equivalent fault is different in SA0 and SA1.
AVSREQ-160099 FUNC_SAFETY_CONCURRENT INTERNAL EXCEPTION occur when using -strobe_file option
AVSREQ-121384 SIM_CAPTURE_REPLAY Do not replay a set of signals specified in an ignore file
AVSREQ-154788 GLS_SDF No NTC applied during dynamic annotation
AVSREQ-160238 XRUN_GENERAL Add an option to compile c-code when using "-elabonly"
AVSREQ-154768 DEBUG_DESIGN_DATABASE LWD enhanced database removing diagnostic messages from in 21.03v5
AVSREQ-150855 COVERAGE_GENERAL xmelab INTERR when -event_or option is used
AVSREQ-142708 SIMVISION_SCHEMATIC Impossible to trace back connection coming from a modport through continuous assignment.
AVSREQ-94917 DMS_VLOG VerilogAMS needs to support multiple analog blocks
AVSREQ-158960 LP_1801 associate_supply_set doesn't accept ss in terminal boundary
AVSREQ-150820 SV_GENERAL Internal Error with cu_vifc_check_access - mark flags mismatched
AVSREQ-147372 FUNC_SAFETY_CONCURRENT fault is UU in serial and DD in concurrent
AVSREQ-161421 LP_1801 MESSAGE: vst_name() - invalid class, class 688
AVSREQ-146758 UVM_SV uvm_hdl_force converts X'es to 1's when target is in VHDL
AVSREQ-155787 SIM_PERFORMANCE VTWMDR inconsistency
AVSREQ-158662 UVM_SV +UVM_TESTNAME not recognized by xmsim because of -file flag
AVSREQ-160063 ASSERTION_SIM Simulation memory blowup with a snapshot having -noassert option
AVSREQ-135301 FUNC_SAFETY_CONCURRENT Support for expression in always sensitivity list in the concurrent engine
AVSREQ-162806 VHDL_PARSE XMVHDL XBDTCF error on function call
AVSREQ-153862 PARSE_SV Unexplained EXPRMS in QUAL
AVSREQ-153896 SIM_PERFORMANCE Using -lwd_complete resulting in core dump
AVSREQ-157503 SV_CODEGEN xmvlog_cg INTERR vsto_ots_left - class, class 892
AVSREQ-142993 GLS_GENERAL Xcelium crashed while elaboration.
AVSREQ-160792 FUNC_SAFETY Ignore new FSV pragma in strobe.list file parser
AVSREQ-152283 ELAB_SV_VHDL VHDL OOMR error (*E,USOOMR) when accessing by wait statement
AVSREQ-161437 LP_1801 Add "average" functionality for create_supply_resolution_function
AVSREQ-91559 RAND_GENERAL The option: -svrnc rand_timeout=10 does not work properly when running with iprof
AVSREQ-154822 VHDL_PARSE Using an underscore as the first character in library name causes xmvhdl_p: *E,BADLPP error
AVSREQ-156349 SIM_VHDL VHDL function call lead to *E, TRINDXC
AVSREQ-159467 JUPITER_BRIDGE MC_RTL_CUST: VERI 1128/1187 errors in MCGFE in customer's RTL test
AVSREQ-158117 VWDB Indago shows incorrect "Recorded Radix" when running with VWDB
AVSREQ-162874 SAVE_RESTART_DMTCP Remove duplicate autosave plusargs
AVSREQ-150943 CORE_SV_IN Elaboration crashes with MESSAGE: Unexpected signal #11, program terminated (null)
AVSREQ-154633 ELAB_SV Incorrect CUVIHR for reference to a packed union member
AVSREQ-161532 FUNC_SAFETY_CONCURRENT MESSAGE: sv_seghandler - trapno -1 addr((nil))
AVSREQ-154637 PARSE_SV New TYPEERR for previously compiled code
AVSREQ-151083 SPECTRE_AMSD Using $cds_analog_exists(signame) results in flavor generation for each instance which results in long compilation time
AVSREQ-147003 SPECTRE_AMSD WARNING (VACOMP-1139) should not occur
AVSREQ-154501 SAVE_RESTART_CHECKPOINT Restoring saved snapshot on CentOS giving Segmentation Fault
AVSREQ-154580 VHDL_PERFORMANCE VHDL with long case? statement taking long time to compile
AVSREQ-160492 GLS_SDF MESSAGE: sv_seghandler - trapno -1 addr(0x49464e495343)
AVSREQ-163153 LP_1801 port is not reflecting correct value at time0
AVSREQ-112091 SIMVISION_SCHEMATIC enhance driver tracing and zooming in schematic tracer
AVSREQ-155975 FUNC_SAFETY_SIM Different result in Serial and Concurrent when using 21.08.a001
AVSREQ-151096 SV_CODEGEN Elaborator internal error with message "gq_auto_swbwo - not found value"
AVSREQ-165779 SPECMAN_COMPILE Compilation gcc error with C generated code using string match within 'all of'
AVSREQ-147485 FUNC_SAFETY B2B fails for FS_CHECKPOINT_TYPE=TIME_OPT
AVSREQ-157046 COVERAGE_MSIE Support deselect_macro with MSIE for TB coverage
AVSREQ-149407 LP_1801 LPS - Support power_replay in PowareAware Model
AVSREQ-152286 CORE_SV_IN Internal error during code generation with MESSAGE: Unexpected signal #11, program terminated (null)
AVSREQ-157909 PARSE_SV xmvlog crashed due to redundant call to new()
AVSREQ-162403 LP_1801 Phase-1: signal corruption for inputs of a PA macro
AVSREQ-150252 VHDL_PERFORMANCE elaboration failure with lwdgen on customer design with latest 21.06
AVSREQ-150392 LP_1801 Using -lps_cov is resulting in LPOVLG Error
AVSREQ-95355 XCELIUM_PORTING Request to add support for specifying covergroup parameters in covergroup's sampling condition
AVSREQ-164850 PARSE_SV NOSYM error generated when compiling code that compiled previously
AVSREQ-82520 DEBUG_PROBE Problem with probing signals exceeding 4096 bits
AVSREQ-156052 MSIE_SIMULATION Force does not work in MSIE single step
AVSREQ-159035 SV_GENERAL TRNULLID: NULL pointer dereference - when emit nba event
AVSREQ-83791 SV_CODEGEN xmvlog_cg: *E,NOWARR: wait on wire array is not currently supported at Line
AVSREQ-147921 RAND_SOLVER XGen API: Add post-post_randomize observer
AVSREQ-100265 SIMVISION_SCHEMATIC SV ifc modport tracing issue with module wrapper
AVSREQ-159875 GLS_SDF Xcelium21.09.002 elaboration crash
AVSREQ-156113 LP_SIM_PERF LPS_SULO_SHARING switches causes Assertion failure
AVSREQ-153510 XRUN_GENERAL support multiple -debug_opts on xrun command line in accumalative manner
AVSREQ-156774 SIMVISION_GENERAL improve reinvoke form for resizing
AVSREQ-155954 SV_CODEGEN assignment data crash in generate block when expression coverage on
AVSREQ-152209 PARSE_SV xmvlog fatal error: attempt to walk off the end of the src chunk array
AVSREQ-155057 SIM_USABILITY Support -nowarn LDVAL when provided using XRUNOPTS.
AVSREQ-159142 LP_1801 Elements right below a terminal boundary cause *W,ILUOTB warning when given as element list for power_domain under terminal boundary
AVSREQ-150933 RAND_SOLVER Randomization incomplete with TRAT
AVSREQ-159570 SV_CODEGEN Performance improvement required for customer design (SWB / Parallel block / Fork)
AVSREQ-142850 XRUN_GENERAL Add an option to not to search for cds.lib
AVSREQ-164143 LP_1801 show soft error message when module or port in lps_pacell_exclude_ic_file cannot be found
AVSREQ-142054 SV_PORTS TYCMPAT, port connections with actual as logic[3:0] b1[2:0] and formal is a enum of logic[3:0]
AVSREQ-121059 DBG_TRANSRECORD_SDI_VERILOG UVM transactions wrongly rendered in Simvision
AVSREQ-152409 ELAB_CLONE Variable on LHS of always_ff not getting updated
AVSREQ-162373 SIM_CAPTURE_REPLAY XMREPLAY crashed when there're instance(rather than signal name) in XMREPLAY_SIGNAL_REPLAY_FILE
AVSREQ-153330 GLS_GENERAL xmelab: *F,INTERR: vst_drive_strength0 () - invalid class
AVSREQ-149159 PROFILER_XPROF Xcelium hits INTERNAL EXCEPTION after test finishes when ran with -mem_xprof option
AVSREQ-160574 SIMVISION_MS AMSD_Simvision : Schematic Tracer : Signal not connected to port
AVSREQ-161930 SV_GENERAL $writememh not accepting env var in file path.
AVSREQ-120171 MSIE_ELAB Enable user provided primtop incrtop in automsie flow with options -addprimtop -addincrtop
AVSREQ-163652 GLS_SDF SDF Annotation is breaking IO realnet connections
AVSREQ-156317 SPECTRE_AMSD EUCCIAS: when analog solver is down, reduce verbosity when selecting instances in Design/Source Browser
AVSREQ-154851 DMS_SVAMS myPkg::myUDN used in SVAMS connectmodule port causes xmelab: *E,CUVNCM
AVSREQ-159293 RAND_GENERAL randcase statement does not pick all possible branches
AVSREQ-157227 LP_1801 Indices are not getting considered by tool during add_port_state command.
AVSREQ-153081 PARSE_SV degradation - xmvlog EXPRMS - when running with 21.06.a001
AVSREQ-149956 SPECTRE_AMSD use spectre_root to find spectre lib dir.
AVSREQ-147379 XRUN_SYSC Support a command-line option lib.so and automatically convert to -L/-l
AVSREQ-163718 LP_1801 pwrObjectDC - elab crash
AVSREQ-153005 FUNC_SAFETY_CONCURRENT Concurrent fault simulation time and memory has been increased drastically with -fault_strobe_data detect_verbose" option
AVSREQ-161918 LP_1801 conflict between new switch -lps_aps_handle and -lps_cov
AVSREQ-149865 JUPITER_ENGINE JUP_CUST_DUMPING: MC sim crashed in "sslu_shm_install_item" following "xmsim: *E,MC : requestProbe called for OptimizedOutSignal CommId" while dumping
AVSREQ-163242 SPECTRE_AMSD Internal exception error during simulation when having an uninitialized 'modelName' parameter and undefined 'modelName'
AVSREQ-99962 SIMVISION_SCHEMATIC Mouse wheel configuration in schematic tracer
AVSREQ-156626 SIM_PERFORMANCE Degraded build time with additional simulation performance switches
AVSREQ-159673 COVERAGE_PERFORMANCE 3x performance overhead when simulating with coverage
AVSREQ-151427 COVERAGE_TOGGLE Incorrect Warning: *W,COVNOEN during Elaboration for Toggle Coverage
AVSREQ-157470 SIMVISION_MS SimVisionMS : Export Browse Currents Sidebar results to CSV/XLSX
AVSREQ-157623 JUPITER_ENGINE Huge simulation memory overhead due to "Load glst DBs" in ATPG GLST design
AVSREQ-124905 SIMVISION_GENERAL When you "Reinvoke Simulator" in SimVision, XRUNOPTS/IRUNOPTS are appended repeatedly in the "Arguments" field
AVSREQ-157907 SIM_VHDL VHDL code does not behave the same way in 2103 vs 1909
AVSREQ-148715 GLS_PERFORMANCE Gate Level Simulation time is more than OT 40%
AVSREQ-158263 XRUN_GENERAL XFS Single-Step Fault Simulation - command line parameters are not part of the "-help"
AVSREQ-159594 LP_1801 crash seen when using lps_ph1_inout
AVSREQ-160167 RAND_GENERAL Randomization internal crash
AVSREQ-166310 SIM_PERFORMANCE Seeing "xmsim: *F,SIGUSR: Unix Signal SIGSEGV" in 222 and full config simulations
AVSREQ-161880 SV_GENERAL xmelab crash
AVSREQ-161278 RAND_SOLVER Internal Error at 'svrnc_trat_solve'
AVSREQ-95693 DMS_ELAB Support EEnet as vddnet and vssnet in Hier-DVS connect module
AVSREQ-164606 GLS_SDF interconnect and ams fix
AVSREQ-154769 SIM_PERFORMANCE Coredump in elaboration: cdp_test_for_nonz
AVSREQ-139619 ELAB_SV Support for string methods "match" and "backref"
AVSREQ-154661 PROFILER_SIM_MEMORY Make -memdetail reporting user tunable based on memory footprint growth
AVSREQ-144784 SPECTRE_AMSD ams_flex PBSR cold restart failed with spectre terminated prematurely due to fatal error
AVSREQ-155471 LP_1801 Low power simulation result mismatch in different Xcelium version
AVSREQ-163541 DEBUG_DESIGN_DATABASE Indago stuck for 5 min when expanding the hierarchy tree
AVSREQ-151322 SV_PORTS Elaboration crash with sv_seghandler - trapno -1 addr(0x20)
AVSREQ-151775 DEBUG_PROBE Pure SHM Probe instrumentation proceeds very slowly on customer MSIE design - SHM/VWDB is okay
AVSREQ-164753 DMS_ELAB xmelab INTERR in reduced testcase for AVSREQ-163823
AVSREQ-158922 SV_CODEGEN Elab crash on code generation
AVSREQ-136185 ASSERTION_SVA Assertion coding style not supported in Xcelium 20.10.001
AVSREQ-164009 LP_1801 simulation failure in low power
AVSREQ-155338 DEBUG_DESIGN_DATABASE Invoking Indago from different dir as xcelium.d prevents Indago from finding -v / -y files in Sandbox mode with autofetch and persistent sources debug.
AVSREQ-161756 JUPITER_BRIDGE MC_RTL_CUST: MCGFEE error leading to MC elaboration fatal with -mce_rtl and ACA's ACCed
AVSREQ-159896 COVERAGE_ALL_COVERAGES xmsim: *F,INTERR: INTERNAL EXCEPTION thrown at runtime when coverage is enabled
AVSREQ-154386 RAND_SOLVER Randomization distribution unexpected
AVSREQ-152070 SPECMAN_E keep select longuint type should support ranges and Keyword Policy
AVSREQ-156441 PARSE_SV Facing xmvlog *E,MPANDC error during compilation in customer migration activity
AVSREQ-150454 SIM_PERFORMANCE Not pruned always block - packed array of clocks
AVSREQ-130139 SV_INTERFACE Support for multidimensional array of interfaces
AVSREQ-159618 DMS_ANALOG_ELAB SV array slice causes a run-time error in AMS simulation
AVSREQ-159460 SPECMAN_METHODOLOGY Testflow: make the objection to end of test configurable
AVSREQ-157351 LP_1801 use -lps_lib_alt_output_dir, if it is set independent of the dir access policy
AVSREQ-102371 ASSERTION_SVA Support of automatic variables in clocking event of assertions
AVSREQ-160887 ASSERTION_SIM Incorrect assertion error when the pulse width is correct
AVSREQ-153536 LP_1801 Should not retain a UDP
AVSREQ-150957 SV_GENERAL Simulator behaving differently when read access is enabled or there is a $display statement on a variable
AVSREQ-160857 LP_1801 xmelab: *SE,LPOVLG: [LPS] Advanced Low Power Verification is currently supported for VHDL and Verilog designs only.
AVSREQ-157257 VHDL_PARSE xmvhdl_cg: *F,INTERR: INTERNAL EXCEPTION
AVSREQ-161063 SV_CODEGEN MESSAGE: sv_seghandler - trapno -1 addr(0x200000000)
AVSREQ-156623 SV_GENERAL Stream operator results different
AVSREQ-148343 SIM_PERFORMANCE Always_comb get poor performance than competitor
AVSREQ-156262 RAND_SOLVER Randomization taking a very long time, huge constraints
AVSREQ-161607 CORE_RAND solver support for strings in constraints (exists and inside)
AVSREQ-147197 SIMVISION_MS Mixed net unreadable using "color signal names according to type"
AVSREQ-151697 LP_1801 Enhancement for not retaining blocking assignments
AVSREQ-117683 VHDL_GENERAL Need verilog ifdef like functionality with VHDL compilation
AVSREQ-153416 ELAB_SV Relax E,NULARG for $fatal()
AVSREQ-159740 SPECMAN_COV Internal Error using empty range for real item
AVSREQ-155037 DMS_AMSD xmelab CUVNCM error with -cds_implicit_tmpdir and custom SVAMS CM
AVSREQ-156711 SV_GENERAL Functional failure with the use of -vlogcontrolrelax NOTPAR or -plussv
AVSREQ-155801 DEBUG_DESIGN_DATABASE Native MSIE LWD build takes 50% longer with 21.09v1 (RC1) than 21.03v5
AVSREQ-154013 MSIE_SIMULATION MSIE : VHDL drivers in incremental lost
AVSREQ-163857 FUNC_SAFETY Vmanager FCM flow fails to stop during prep step when detecting an error
AVSREQ-155970 LP_1801 Isolation dropped at the net, where it should have applied it.
AVSREQ-165642 JUPITER_ENGINE MC_CUST_GLST : Simulation fatal in customer design with 22.01-a001 due to Adaptive Engine
AVSREQ-98566 SIMVISION_GENERAL SIMVISION_WORKDIR environment variable is not working as expected for the bookmark setting
AVSREQ-152087 DEBUG_DESIGN_DATABASE Parameter shows wrong value in Indago when defparam is used
AVSREQ-156813 SIM_PERFORMANCE Degraded build time with -newperf additional sub switch -enable_isfmt
AVSREQ-147846 DMS_VLOG How to suppress MACRDF warning
AVSREQ-156092 VHDL_PERFORMANCE unexpected memory consumption on mixed language simulation.
AVSREQ-162684 SV_CODEGEN xmsim: *E,RNDSQOF: Randsequence infinite production recursion, will do a break from this statement
AVSREQ-156942 SIM_PERFORMANCE Seg fault during Primary elaboration using latest 21.09v1 RC
AVSREQ-163095 JUPITER_BRIDGE MC_RTL_CUST: Simulation crash at time 0 coming from Communication layer in FacadeSC with -mce_rtl (ACA NACCed) in customer design
AVSREQ-158608 LP_1801 Elaboration crash on low-power environment
AVSREQ-155927 ELAB_PERF '1 interpreted as 1 with -constexpropt
AVSREQ-154481 ELAB_SV Xcelium is not returning correct paths to Indago, hence Indago is not able to find the source files
AVSREQ-154343 SV_INTERFACE xmvlog_cg: *F,INTERR: in 20.05.001
AVSREQ-145988 PARSE_SV xmsim makes a "vst_smtofile - logical line not found, class 652" crash with ida_probe
AVSREQ-151188 ELAB_BIND multiple fanout check in hierarchical signal connection
AVSREQ-153464 LP_1801 XRIO needs update for isolation references included in default domain
AVSREQ-154319 RAND_DEBUG Latest librnc hangs during OC analysis
AVSREQ-159623 XPROPAGATION_GENERAL ELAB crash: gq_maxbitaccess - no bit vector
AVSREQ-108706 DMS_ANALOG_ELAB xmsim crashes with internal exception in a very simple AMS testcase
AVSREQ-156586 LP_1801 Simulation *E,LPSRSIZE The size of the register power_state_name_reg is too small for the value Undefined
AVSREQ-152713 VPI_LWD INDAGO: Unable to perform source navigation from source browser for one of the inner task call
AVSREQ-122951 LP_1801 Issue with find_objects because of difference in hierarchy when compared to FSDB
AVSREQ-153707 PARSE_SV xmvlog:*E,TYPERR error occurrence with 21.07.a001
AVSREQ-156396 GLS_GENERAL Continuous assignment fails to propagate with access +r. access +rw works fine.
AVSREQ-155912 SAVE_RESTART_CHECKPOINT (PBSR) When giving alternate dir to save, Xcelium still writes to orig build dir
AVSREQ-155062 PARSE_SV *E, RNCTYP, on using string in associative array in random constraint
AVSREQ-156598 SIM_TCL Crash in simulation using "TIME_OPT" FS_CHECKPOINT_TYPE with "-absolute" timing
AVSREQ-159870 DMS_ANALOG_ELAB SV parameter used inside generate block caused a xmsim crash in AMS simulation
AVSREQ-159036 SV_GENERAL *E,TRNULLID: NULL pointer - when NBA event is emitted
AVSREQ-155187 XCELIUM_PORTING E,EFASAM - iff used in covergroup sampling
AVSREQ-139634 XCELIUM_PORTING EFASAM: Covergroup argument in sampling condition is not supported
AVSREQ-155526 PARSE_SV INTERR vxt_build - default (843) on compile error
AVSREQ-162282 JUPITER_BRIDGE MC_RTL_CUST: Multicore code generation crash in "Generate Variables SplitDb" stage with -mce_rtl (ACA's NACCed)
AVSREQ-157693 SV_INTERFACE elab crash related to vif of an uninstantiated interface
AVSREQ-161079 CORE_RAND RNDBDSYNTXFATAL when running SR
AVSREQ-133863 DMS_SIM Provide file name/path and line number to debug 'System task/function $cgav' listed in Xcelium profiler report
AVSREQ-153345 CORE_SV_IN Crash during code generation with message "Unexpected signal #11, program terminated (null)"
AVSREQ-159044 DMS_PERF Elaboration is reporting multiple drivers (MULDRNW) error for bind instance output (with option -enable_dotstar_var_tlg_assoc)
AVSREQ-146097 LP_1801 TCL commands are not supported in power model blocks
AVSREQ-148133 LP_1801 Need to add support for any combination of packed and unpacked MDAs for query_isolation -elements
AVSREQ-147017 LP_1801 No isolation should be applied if set_port_attribute is_analog is set
AVSREQ-159689 SIM_SV xmvlog_cg Crash MESSAGE: gq_get_vifc_pib - null vifc_wormhole_handle
AVSREQ-158191 LP_1801 clock is showing an unexpected delay at liberty input
AVSREQ-164417 SPECMAN_E wrong value at all_off thread number
AVSREQ-164133 DMS_LP_AMS Elab crash with xmelab: *E,CUVIMG (./rundir/INCA_libs/AMSD/cds_amslps_simulation.vp): Implicit name not allowed in hierarchical name.
AVSREQ-153803 SIM_SV force value not updating correctly in always_comb
AVSREQ-161472 ELAB_PERF *F,INTERR: INTERNAL EXCEPTION; cuv_xewaitset - illegal dynamic waiter
AVSREQ-162777 FUNC_SAFETY Discrepancy in serial vs concurrent transient campaign
AVSREQ-102493 PARSE_SV parser is not generating an error when reference to a local variable references non-existent object
AVSREQ-157125 LP_1801 Implement and R&D testing for sim_replay_control support
AVSREQ-86833 RAND_SOLVER Need to support $clog2 natively in the solver
AVSREQ-147536 LP_1801 Support for add_power_state for SupplySet and power domain primary as separate groups
AVSREQ-160359 JUPITER_BRIDGE MC_RTL_CUST: Elaboration crash in Multi-core code generation in customer's RTL test case
AVSREQ-157698 RAND_SOLVER Enhancement: Native support for $clog2 in solver
AVSREQ-154551 LP_SIM_PERF xmsim *F,INTERR after user changes signal direction in Low Power file
AVSREQ-155341 VHDL_PARSE xmvhdl_p * F,INTERR:INTERNAL EXCEPTION
JIRA ID COMPONENT SUMMARY
AVSREQ-158951 JUPITER_BRIDGE In-house customer's RTL design crashes in ACC NACC Analysis Phase in Elab
AVSREQ-159080 DEBUG_PROBE Memory declared as wires exceeding VWDB limit are ignored but probed by SHM
AVSREQ-160013 LP_1801 MESSAGE: dto_num_scalars - unexpected kind (513)
AVSREQ-158946 XPROPAGATION_GENERAL xmvlog_cg: *F, TMPSPC error for xprop CAT mode
AVSREQ-161175 ELAB_PERF GPGSNF, gpg_sim sanity check at simtime needs to be enhanced
AVSREQ-160212 LP_1801 Information Model mirroring power domain handle into class object
AVSREQ-100958 DEPRECATE_ELAB_GENERAL Getting 'parse error's with xcelium at elab stage when used inside nested "-F" option
AVSREQ-154714 MSIE_SIMULATION Internal Error in 21.07-a001
AVSREQ-161838 SAVE_RESTART_DMTCP PBSR needs to support moving a save point to a new directory
AVSREQ-160557 PROFILER_SIM_RUNTIME xmprofmerge.pl fails to merge non-random tests
AVSREQ-88353 SYSC_GENERAL How to probe a value from a user defined datatype into shm?
AVSREQ-155257 FUNC_SAFETY_CONCURRENT Concurrent simulation has different results when executed with multiple nodes and with single node.
AVSREQ-156619 SIM_CAPTURE_REPLAY INTERR driving dms signal via xm_replay
AVSREQ-152558 SV_CODEGEN xmelab INTERR gq_check_lhs_read_in_loop - bad LHS
AVSREQ-157239 SIMVISION_MS Mixed Net Browser: sort not working for scientific notation values
AVSREQ-154579 SPECTRE_AMSD fixed the bug in constructing branch current name which caused unexpected assertion failure
AVSREQ-158003 DEBUG_DESIGN_DATABASE INTERR: Invalid argument - spath_absolute_nostat
AVSREQ-141316 ASSERTION_SVA Support for nested checkers Phase 1
AVSREQ-158617 PROFILER_SIM_RUNTIME License failure with -profile and CLA
AVSREQ-158347 SV_GENERAL Simulation mismatch due to failed queue concatenation
AVSREQ-161890 DMS_MSIE Using -automsie didn't improve elaboration time : need improvement in partitioner/genhref DMS coercion and RNM CM Insertion
AVSREQ-116449 GLS_GENERAL wrong simulation output in signals without TCL stop command
AVSREQ-161899 SV_DATATYPES Values of 3D array of parameters are not assigned in "left to right" order
AVSREQ-160199 SV_INTERFACE CUIDUP error seen when invoking xrio
AVSREQ-158829 IP_PROTECT_GENERAL "Unable to open file for writing" error with "-ifileprotect" and "-outdir" of xmprotect
AVSREQ-155196 SIM_PERFORMANCE Optimizations causing unexpected x on output signal
AVSREQ-157408 SIMVISION_DB_UTIL A way to share waveform file at a specific hierarchy (IP level) with hierarchies above the IP level stripped
AVSREQ-164353 SAVE_RESTART_CHECKPOINT Making "-setenv XM_PBSR_FORCE_PAKCOPY=1" as default setting
AVSREQ-159024 DMS_ELAB SIE Input use case works only with -dms_perf, but crashes w/o it
AVSREQ-96997 SIMVISION_SCHEMATIC SimVision schematic tracer does not trace the SV interfaces well
AVSREQ-131969 DMS_LICENSE license problem when using process-based save-and-restart
AVSREQ-163508 SIMVISION_GENERAL SimVision bookmarks do not respect SIMVISION_WORKDIR environment variable
AVSREQ-129208 SPECMAN_E OS Signal in Indago recording
AVSREQ-150031 PARSE_SV xmvlog crash in modem environment vst_ref() invalid class, class 740
AVSREQ-151216 JUPITER_ENGINE Waveform probing count in Performance report
AVSREQ-157798 LP_1801 Got elaboration INTERNAL EXCEPTION after using UPF
AVSREQ-153481 COVERAGE_GENERAL set_com xmelab INTERR seen when debugging AVSREQ-150855
AVSREQ-100529 SIMVISION_SCHEMATIC SimVision Schematic tracer zooms out when I double-click on a net
AVSREQ-100911 LP_1801 incomplete support for -supply_map option in apply_power_model
AVSREQ-161502 GLS_GENERAL Unable to dump waveform for GLS database. Simulation hangs while initiating the wave dump probe from Tcl file.
AVSREQ-152171 MSIE_ELAB add support of OOPR for mixed-language design
AVSREQ-154044 SV_PERFORMANCE Task inline optimization causing test failure
AVSREQ-149136 LP_1801 *E,ELBERR in LP build using -lps_enable_ftg_sharing
AVSREQ-154486 PARSE_SV Unpacked array part select gives TYCMPAT error in function argument
AVSREQ-157439 FUNC_SAFETY_XFR xfr: *E,FAFDET: [FLT] XFR does not support merging of Abstract Classification based Faults, remove Abstract Faults to process merge.
AVSREQ-160042 GLS_SDF Internal exception: MESSAGE: rts_abrthandler - SIGABRT unexpected violation
AVSREQ-158167 PARSE_SV xmvlog build crash MESSAGE: dsc_mark_used - refcnt went negative
AVSREQ-163236 ASSERTION_COMPILE ILLPRI error generated when compiling code that passed compilation in prior releases
AVSREQ-148245 SV_PERFORMANCE Simulation wrong behavior - if statement is ignored
AVSREQ-161030 FUNC_SAFETY Prep script issue with fault file
AVSREQ-154490 IXCOM xmelab *F INTERNAL EXCEPTION sss_hname - can't find AOI index
AVSREQ-146768 SIMVISION_MS Design Browser: Need Show/Hide button in Design Browser Sidebar
AVSREQ-160514 LP_1801 Elaboration *E,UDFUOBJ for connect_supply_net command using UPF_GENERIC_SOURCE supply
AVSREQ-95513 SIMVISION_SCHEMATIC Final issues with regards to tracing through modports in interfaces
AVSREQ-152874 COVERAGE_PERFORMANCE High expression coverage overhead
AVSREQ-160665 LP_1801 UPF_GENERIC_SOURCE null value for isolation cell as source
AVSREQ-144127 XM_UTILS_GENERAL $xm_mirror value from an output struct type
AVSREQ-151693 JUPITER_ENGINE MC_CUST_EVAL: Running low active logic faster on MC Engine side by smart handling of cores dynamically at run time
AVSREQ-160773 GLS_TIMING GLS:INTERR at elab with non-PG netlist
AVSREQ-161244 MSIE_ELAB Renaming of autohref.txt through a switch
AVSREQ-153272 XRUN_GENERAL An error message after simulation has ended - double free or corruption
AVSREQ-156205 SV_CODEGEN Fatal error when using -afile
AVSREQ-160774 COVERAGE_CODE unexplained expression coverage holes
AVSREQ-91041 SIM_TCL Automatic exit gives no indication of problem - lack of run command
AVSREQ-152517 SIM_SV xmsim, *E, TRNULLID with -enable_rswt
AVSREQ-153779 SV_PORTS RTL design encounters unexpected error during evaluation (xmelab: *E,CICAPC ... array port connection)
AVSREQ-157381 CORE_RAND solver crash rnc_binop_node::eval_bi()
AVSREQ-155250 SIMVISION_SOURCE_BROWSER No source code available for: xcelium::top in Source browser
AVSREQ-157222 RAND_GENERAL Soft constraint on real rand variable with Xcelium Constraint Solver
AVSREQ-150179 SAVE_RESTART_GENERAL Why does XCELIUM access log file created at the time of save at the time of restart?
AVSREQ-154970 GLS_PERFORMANCE simulation memory blow up due to -add_seq_delay
AVSREQ-149493 ASSERTION_SVA Overlapping implication in SVA only triggers once
AVSREQ-158616 SIM_PERFORMANCE Async reset not working with "enable_pes_skip_schedule*" option
AVSREQ-155030 LP_1801 SOI technology Support create_supply_set -function to connect nwell to ground
AVSREQ-157023 SIM_SV xmsim crash: MESSAGE: T(0): sv_seghandler - trapno -1 addr(0x7fd52ce94a08) Method SSS_MT_SVHASSIGN_ER_US
AVSREQ-153170 ASSERTION_PERFORMANCE High runtime memory with procedural concurrent SVA
AVSREQ-146772 SIMVISION_MS Need equivalent TCL command for Browse Currents
AVSREQ-155727 DMS_ANALOG_ELAB A "reg" type bus connected to a module gives error
AVSREQ-154467 PROFILER_SIM_MEMORY XLM to report memory statistics periodically during simulation
AVSREQ-151732 ELAB_SV *E,NULARG : Null Args passed to $fatal
AVSREQ-155534 DMS_LP_AMS Crash during elaboration in SPICE+UPF sim with message: p_pot = NULL [NULL decl POT] - pwr_break_expr_vlog_etc
AVSREQ-153919 XPESSIMISM_GENERAL Change all + options to options.
AVSREQ-154515 SIMVISION_MS Simvisdbutil does not export complete waveform
AVSREQ-156616 SAVE_RESTART_CHECKPOINT (PBSR) xmsim: *E,DLNORD: Intermediate file for module ... could not be read
AVSREQ-162011 LP_1801 Can we get bit-blasted output of isolated signals
AVSREQ-153074 ELAB_BIND xmelab crash when multiple binds used
AVSREQ-156461 ELAB_PERF Getting *E,WOUPXR with -DMS_VTW and -ENABLE_VAR_OPT_CORE
AVSREQ-166922 DMS_LP_AMS xmelab crash : sv_seghandler - trapno -1 addr((nil))
AVSREQ-130898 COVERAGE_TOGGLE support propagation of vector exclusion at the boundary of vhdl and verilog
AVSREQ-168019 GLS_TIMING Tcl "tcheck" enhancement request: Controlling timing checks of individual ports like "-tfile"
AVSREQ-125104 DEBUG_PROBE -packed/-unpacked should apply to both wires and variables/regs
AVSREQ-119251 CORE_SV_IN Internal exception when simulating after putting breakpoints in UVM code.
AVSREQ-112334 PARSE_SV Allow class definition in generate construct
AVSREQ-159326 DEBUG_DESIGN_DATABASE modifications to support gpg_sim for vpiStringConst parameters
AVSREQ-156203 SIMVISION_MS Conversion from SST2 to VCD with simvisdbutil is broken since xlm 20.09.014
AVSREQ-155950 RAND_PERFORMANCE The performance issue of huge memory usage
AVSREQ-141240 LP_1801 balloon style register is not corrupt when retention supply becomes corrupt + Retention enable signal is not being corrupted when toggling during CORRUPT_ON_ACTIVITY
AVSREQ-152000 CORE_SV_IN Internal error during code generation with MESSAGE: Unexpected signal #11, program terminated (null)
AVSREQ-155336 DEBUG_DESIGN_DATABASE Symbolic link prevents Indago from finding -v / -y files in Sandbox mode with autofetch and persistent sources debug.
AVSREQ-153594 PARSE_SV INTERR: Missing Functionality
AVSREQ-161827 LP_1801 Incorrect error issued for real parameter value specified as 2nd argument to $supply_on
AVSREQ-81401 SIMVISION_SIGNAL_TRACING Driver trace does not show driver of signal driven from generate block (beyond an interface)
AVSREQ-158605 UVM_SV Update UVM1.2 library to extend ML_UVM_DISABLE or remove ML content
AVSREQ-153913 XPESSIMISM_GENERAL Dump contents of correction file after analysis is completed
AVSREQ-154817 FUNC_SAFETY_CONCURRENT Mismatch in XFS Concurrent vs XFS Serial Results, no detection in XFS concurrent
AVSREQ-143478 GLS_TIMING Value change information of signals when timing violations happen
AVSREQ-138687 ASSERTION_SVA Supporting automatic variables in assertion clocking event
AVSREQ-157705 LP_1801 Boolean expression without whitespace in "-logic_expr" of "add_power_state" caused *F,UNDFPS error.
AVSREQ-100614 ELAB_SV System verilog warning CUVIHR regarding task and modport seems wrong
AVSREQ-124423 ASSERTION_SVA Support of automatic variables in clocking event of assertions
AVSREQ-163287 LP_1801 One more list of dropped isolations due to
AVSREQ-149078 SPECMAN_E Bad enum value for 'numeric_format_kind' when printing numeric type with radix setting
AVSREQ-169438 SIM_PERFORMANCE significant performance degradation due to unnecessary seeding of fork/join blocks
AVSREQ-132090 FUNC_SAFETY_CONCURRENT Support for expressions in always sensitivity list in the concurrent engine
AVSREQ-159462 JUPITER_BRIDGE MC_RTL_CUST: Elaboration crash due to mishandling of ACA of enum type in MCGFE
AVSREQ-158402 SIM_PERFORMANCE Mixed packed+unpacked multi-dimensional array transfer from one variable to another not working
AVSREQ-167766 XPROPAGATION_GENERAL Different Xprop behavior W/WO protected RTL
AVSREQ-147327 COVERAGE_MSIE MSIE support for TEST BENCH Code coverage
AVSREQ-163859 LP_1801 Output of upf_generic_sink , expected isbut getting output same as of upf_generic_source
AVSREQ-152151 MSIE_SIMULATION Randomization crash during runtime in MSIE mode
AVSREQ-162289 SV_INTERFACE Reduce call overhead for cu_lpii_is_qualifying_interface()
AVSREQ-157821 XRUN_GENERAL xrun fail on incdir path with double '//' in beginning of given path +incdir+//path/
AVSREQ-153856 FUNC_SAFETY_XFR xfr performance issue with -fault_strobe_info
AVSREQ-160316 LP_SV LHS not taking in LPX mode
AVSREQ-158384 IXCOM Enhancement reqeust : Sort for autoHwAccessExports_*.sv
AVSREQ-162005 LP_1801 What are possible reasons when "set_isolation -source" filters ports that are driven by the given source?
AVSREQ-160328 PARSE_SV enable_cuscope_verbose takes the source file as its log file
AVSREQ-81599 SIMVISION_LOW_POWER send to power supply network should zoom into the related area
AVSREQ-150443 SPECMAN_E C FLI mapping of uint(bits:33-64) into C uint64_t
AVSREQ-157356 SV_CLASSES xmelab error CUILLHIN with 21.10.a001 EHF
AVSREQ-157437 ELAB_SV CUVUNF elab crash no explanation
AVSREQ-102369 DMS_VLOG Support multiple analog begin-end sections in Verilog-AMS
AVSREQ-151723 ELAB_PERF Build time (compile) Performance improvement
AVSREQ-153668 GLS_TIMING xprof report for GLS timing simulation need to show "time consumption" mapping to design hierarchies
AVSREQ-160091 LP_1801 Signal from VHDL entity is not treated well for all instances.
AVSREQ-157423 GLS_TIMING Xcelium21.03.007 elaboration crash (part1)
AVSREQ-156176 HAL Internal error when -hal is used
AVSREQ-154842 COVERAGE_SIMULATION INTERR cov_eval_local_toggle_cks - modport port register toggle data not found
AVSREQ-154414 DMS_SVAMS importing package inside of connectmodule does not work properly
AVSREQ-154865 MSIE_ELAB Instance paths in xfiles not found in single-xrun MSIE.
AVSREQ-162444 SIM_PERFORMANCE -DISABLE_PIB_OPT causes internal error. Option -disable_aca_prune can be tried as workaround.
AVSREQ-124128 ASSERTION_SVA Change ASRTPO warning message when the issue is coming from cover property
AVSREQ-163545 SR_BACKDOOR Use unsigned numbers in reporting a list of values of enum, when backdoor_enum_info is specified
AVSREQ-156518 PARSE_SV xmvlog CLNSPX with constraints despite being inside `ifndef
AVSREQ-160464 CORE_SV_IN save and restart + dynamic test reload crashes in 21.09v
AVSREQ-157307 PARSE_SV xrun -scu creates internal error
AVSREQ-154375 JUPITER_ENGINE Simulation fatal in customer's parallel ATPG test case (degradation)
AVSREQ-153662 SV_PERFORMANCE Simulation performance is slower when Xcelium handle with queue.delete(0)
AVSREQ-152466 ELAB_PERF shm dump crashes with gpg sim feature enabled in latest EHF
AVSREQ-162222 SPECMAN_TEMPORAL Variable reaches value out of range in nested 'first of for each'
AVSREQ-163618 XRUN_GENERAL -indago_args should be a public option
AVSREQ-159717 SV_GENERAL A ref argument of a function doesn't work properly when passed from an associative array.
AVSREQ-156776 MSIE_ELAB In automsie flow, seeing INTERNAL EXCEPTION during elaboration
AVSREQ-153268 DEBUG_PROBE xmsim is listening on a port that accepts unauthorized connection
AVSREQ-155783 LP_1801 Add support to read/record is_soi/is_analog/is_isolated attribute in Xmlib2cdb
AVSREQ-155741 SIM_SPARSE_ARRAY [degrade] REGSOV error for large size array.
AVSREQ-153203 SIM_CAPTURE_REPLAY XMREPLAY to report signal mapping rate on mapping file of XMREPLAY_SIGNAL_REPLAY_FILE and XMREPLAY_SIGNAL_ATTRIBUTES_FILE
AVSREQ-167171 COVERAGE_GENERAL Internal Exception Error while using -bbconnect Switch.
AVSREQ-160820 IP_PROTECT_GENERAL xmprotect: Issues Memory Not Available
AVSREQ-157508 VWDB by default does not print auto-update messages to stdout
AVSREQ-157766 LP_1801 power model: error message claims find_objects accepts only obj_type port
AVSREQ-157134 VPI_GENERAL xmsim: INTERNAL EXCEPTION gets to crash
AVSREQ-153229 XPESSIMISM_GENERAL Moving Xpessimism analysis phase to elaboration
AVSREQ-157335 SV_CG_PERF Long compile time at "xrun -elaborate" in IXCOM 2 step flow compared to "irun -elaborate"
AVSREQ-162811 SIM_PERFORMANCE get_supply_state not getting updated
AVSREQ-159967 PARSE_SV Positional parameters handled incorrectly for type param
AVSREQ-160089 LP_1801 xmsim:*E,LPSLNK when -lps_cov is used
AVSREQ-144119 GLS_TIMING Timing violations off on a multi bit flop's selective bits using tcheck TCL command
AVSREQ-153858 GLS_GENERAL Gate amalgamation causing functional failure
AVSREQ-157111 ELAB_SV_VHDL SystemVerilog alias appears unconnected
AVSREQ-165926 SPECMAN_E Failure before restore completion causing seg. fault crash
AVSREQ-149421 DMS_AMSD Need ability to disable AMS UNL semantics for pure digital simulations from Virtuoso via AMS-UNL flow(short-term/workaround)
AVSREQ-160460 SPECMAN_COV missing buckets when using ignore with modulo
AVSREQ-158969 SV_GENERAL SV issue using the min array locator function
AVSREQ-156400 SIM_USABILITY xmsim LIBRUN message doesn't show the actual dynlib path that failed to load
AVSREQ-154027 LP_1801 Constant corruption between domains
AVSREQ-160211 SIM_PERFORMANCE intermittent sim failures when building with same options due to -enable_share_aca
AVSREQ-162214 SPECMAN_ERRORS Indago SNI - Specman crash when abort from stop state
AVSREQ-158924 SIM_PERFORMANCE VTW functional mismatches not detected by VTW warnings
AVSREQ-152464 SPECMAN_SAVE_RESTORE Indago launch crash (OS signal 11) at Specman 'DA restore'
AVSREQ-157554 COVERAGE_MSIE MSIE support for deselect_macro/code coverage of classes
AVSREQ-153398 SV_PERF The simulation behavior is different between w/wo -newperf
AVSREQ-157384 IP_PROTECT_GENERAL Xmvlog compile error for encrypted file
AVSREQ-145644 RAND_GENERAL RNCTYP error when using string in associative array exist method
AVSREQ-158780 SPECMAN_HAL High memory consumption using e lint
AVSREQ-163053 ASSERTION_SVA xmvlog crash - createDtOfExprVST: invalid ref into class
AVSREQ-158551 DMS_VLOG AMSD: MACRDF warnings when using ie card
AVSREQ-159829 DMS_ELAB Print messages in xmelab.log when DMS processing enabled
AVSREQ-156937 SIM_FORCE_RELEASE Simulation hang issue during force statement execution
AVSREQ-140702 FUNC_SAFETY_CONCURRENT Safety Waveform should be SHM format rather than VCD format
AVSREQ-152627 LP_TCL xmsim crashs using the power TCL command
AVSREQ-160217 CORE_SV_IN xmvlog_cg crashes w/o -mccodegen and using setarch
AVSREQ-83151 SIMVISION_SCHEMATIC [SimVision] Schematic Tracer doesn't show expected SV interface connection
AVSREQ-154994 FUNC_SAFETY_SIM MSIE+PBSR Flow: Fault simulation hangs
AVSREQ-95418 DMS_VLOG Multiple analog blocks not supported in VerilogAMS
AVSREQ-150369 SIMVISION_SCHEMATIC Simvision 'schematic tracer' supports to scroll and zoom with mouse wheel
AVSREQ-155339 RAND_GENERAL queue.rand_mode(0) doesn't impact non-yet-existing elements
AVSREQ-161514 DMS_AXUM default binding on spice primitive is not respected
AVSREQ-130059 GLS_TIMING wrong and multiple drivers on output of buffer
AVSREQ-130182 SIMVISION_CONSOLE Simvision command used to enable unit names does not work
AVSREQ-160710 LP_1801 Power switch output supply is corrupted when the switch enable is OFF and the ack_port supply (-supply_set) is not NORMAL
AVSREQ-160465 SIMVISION_GENERAL Request to save the locking feature of a marker in Simvision when saving a .svcf Simvision command script file
AVSREQ-157887 SR_BACKDOOR Change licensing to not check out on observe mode
AVSREQ-149374 SIM_CAPTURE_REPLAY XMREPLAY didn't replay certain signals correctly when same recorded signal is used to replay to multiple signals
AVSREQ-157757 LP_1801 Wrong UPF_GENERIC_OUTPUT for using concatenation on highconn
AVSREQ-161168 VPI_PERFORMANCE vpiSimNet is broken for simulation nets that are bits of a vector
AVSREQ-160803 ELAB_SV CUFGBS error message does not tell user what instance has the problematic code
AVSREQ-77655 GLS_TIMING Warning NTCNNC is not reported with option -ntc_verbose
AVSREQ-162532 LP_1801 2 dimentional logic got corrupted
AVSREQ-161499 JUPITER_BRIDGE MC_RTL_CUST: New MCGFE errors with -mce_rtl leading to MCG crash in customer's design
AVSREQ-154751 SIM_SV Address printed from SIGILL seems to be lower 32-bits of 64-bit address
AVSREQ-159365 SIM_PERFORMANCE optimization is affecting simulation result (sensitivity list member seems ignored)
AVSREQ-152645 SV_GENERAL Internal exception when providing incorrect module names in the toggle exclude file
AVSREQ-139018 SPECTRE_AMSD Illegal type real shift operand (left operand) in vcvs gain expression
AVSREQ-145217 SIMVISION_MS Current Browser: Need to display Leaf current for specified subckt instance
AVSREQ-158553 DMS_AMSD Skip .scs file process with -ignore_ams_unl_semantics option
AVSREQ-157064 DMS_ELAB autospiceoomr behave incorrect when it is SPICE relative hierarchy
AVSREQ-146597 SV_GENERAL Change DTSTAR from warning to note
AVSREQ-158237 JUPITER_ENGINE Xcelium MC - wrong simulation results and internal error
AVSREQ-155027 FUNC_SAFETY_CONCURRENT sv_seghandler - trapno -1 addr(0x308) when using -fault_rtl
AVSREQ-91912 ELAB_SV E,ILLHIN Error message is not invoked when uvm involved.
AVSREQ-110042 LP_1801 Process in a PD not triggered when PD get ON in xcelium
AVSREQ-162801 PARSE_PERF xmvlog time is very high for "relatively" small 111 config bench
AVSREQ-156740 XCELIUM_PORTING Facing xmvlog *E,EFASAM error from coverage models during compilation in migration activity
AVSREQ-88753 XCELIUM_PORTING E,EFASAM for using inputs to covergroups as sampling
AVSREQ-150607 SV_GENERAL difference in output btw code in function & code in initial block
AVSREQ-158711 SIM_PERFORMANCE Elab crash when MSIE is enabled
AVSREQ-126826 XPROPAGATION_GENERAL X-Propagation Disabled for Return statement in VHDL
AVSREQ-161836 SIM_PERFORMANCE -delay_trigger introduces severe slowdown across the test suite in 20.12
AVSREQ-159213 SIM_PERFORMANCE xmelab Internal exception : sv_seghandler - trapno -1 addr((nil))
AVSREQ-155914 DEBUG_PROBE Disable MTD in Interactive mode
AVSREQ-95077 SIMVISION_SCHEMATIC simvision schematic tracer zoom in/out "Center and Zoom after adding objects" option not working
AVSREQ-159289 ASSERTION_SVA xmvlog INTERNAL EXCEPTION on ixcom generated SVA code
AVSREQ-119027 GLS_PERFORMANCE Didn't Kick-off CDP Optimization wo nocellaccess
AVSREQ-150489 GLS_TIMING ISOINTI error occur when using 21.03.a001
AVSREQ-154513 ELAB_CLONE Wrong simulation results with xmclone build snapshot
AVSREQ-156447 ELAB_SV_VHDL Is there a good solution for "xmelab: * E, NOOOMR VHDL OOMR not supported"?
AVSREQ-160818 COVERAGE_PERFORMANCE Improve Coverage checksum computation performance
AVSREQ-157002 LP_1801 xmelab: *E,CSNMCN: [LPS] HDL port (a.b.c.d.VDD) connected multiple times through connect_supply_net
AVSREQ-154650 PARSE_PERF MISLUN missing top level module for xmelab
AVSREQ-164448 DEBUG_DESIGN_DATABASE Driver tracing is missing forces on a wire
AVSREQ-158079 LP_1801 Bit blasting UPF_GENERIC_OUTPUT, UPF_GENERIC_PRE_ISO and Elements for query_isolation
AVSREQ-155067 LP_1801 What is an expected result of W,ILUOTB and W,ILOBJUE, when setting "-attribute terminal_boundary TRUE" for a set_design_attribute in LPSIM?
AVSREQ-152693 MSIE_PERFORMANCE Elab hangs and blows in memory with auto MSIE partition
AVSREQ-112680 SIMVISION_SCHEMATIC Simvision does not connect the interfaces correctly when showing schematics
AVSREQ-156115 SIM_SAIF_TCF Forward SAIF usage in dumpsaif TCL command causes xmsim segfault
AVSREQ-159919 DEBUG_DESIGN_DATABASE Driver Tracing - VHDL signal tracing not working
AVSREQ-157428 VWDB auto-update not working for customer
AVSREQ-152302 SIM_PERFORMANCE Behavior differences in simulation that cause failures
AVSREQ-157948 SIM_PERFORMANCE Elabration crash with -enable_always_ca
AVSREQ-159022 DMS_ELAB SIE Input use case works only with -dms_perf
AVSREQ-146770 SIMVISION_MS Provide additional information for Describe command used with mixed net instance
AVSREQ-155586 DEBUG_PROBE Simulation exits unexpectedly: rts_abrthandler - SIGABRT unexpected violation
AVSREQ-163494 ELAB_VHDL Xcelium 21.03 VHDL code generation crash
AVSREQ-163278 LP_1801 UPF_GENERIC_SOURCE should not pick up as source the isolation cell that belongs to that strategy
AVSREQ-156529 LP_1801 Invalid HIOINP* warning message for inout type in Power Ground model with -lps_ph1_inout
AVSREQ-154069 LP_1801 Missing isolation when using set_repeater
AVSREQ-161937 MSIE_ELAB xm_force makes a href since 21.07-a001
AVSREQ-129417 DMS_ANALOG_ELAB connect module interface misbehaving in xcelium 20.03 (AMS_BROAD_NET=NO)
AVSREQ-157563 VWDB
AVSREQ-150886 PARSE_SV Internal exception reported during compilation xmvlog MESSAGE: vst_metrics - D default = 871
AVSREQ-164711 SIM_PERFORMANCE vwdb crash xmsim - xdiInstFcty::FindOrCreateObj
AVSREQ-155445 SIMVISION_DB_UTIL Simvisdbutil: Extracted signal hierarchy is lost while extracting signals present inside struct datatype
AVSREQ-154613 ELAB_PERF Analysis of elab time increase when structural cells are introduced
AVSREQ-164551 SV_INTERFACE *E,CUIDUP error shown when "-lps_sv_interface_port_enh" is used
AVSREQ-156858 SIMVISION_GENERAL simvision reinvoke options reloaded XRUNOPTS arguments
AVSREQ-155353 FUNC_SAFETY_SIM MSIE+Normal Save Restart Flow : Fault simulation hangs
AVSREQ-141310 XM_UTILS_GENERAL $xm_mirror not working for a packed struct
AVSREQ-152301 DCP Replace the microtar package in dcp
AVSREQ-159784 SIM_PERFORMANCE xmelab crash with ivia_pair_sanity_check
AVSREQ-153531 LP_1801 Support for query_isolation key UPF_GENERIC_SOURCE
AVSREQ-137045 UVM_SV uvm_message doesnt work while scope is vhdl
AVSREQ-158958 SV_INTERFACE Elab crash: tl_next_subsumed_always - last not found
AVSREQ-163277 LP_1801 UPF_GENERIC_SOURCE is returning wrong supply_set for liberty as source
AVSREQ-139355 COVERAGE_CODE Expression code coverage unexpected hole
AVSREQ-163703 LP_1801 NOISELE for one of the 3 scopes.
AVSREQ-156809 SIM_FORCE_RELEASE Simulation stuck on time 0 for 10 min when running with UPF
AVSREQ-155072 PARSE_SV can't set a delay with arc containing an unpacked array
AVSREQ-156026 SIM_PERFORMANCE afile performance issue (when used with -ENABLE_WILDCARD_FILE)
AVSREQ-148932 PARSE_SV need support for import functions in modport
AVSREQ-158601 DEBUG_PROBE SHM is taking longer in 21.03.v005 compared to 20.12.t004
AVSREQ-160874 DCP amsspice ERROR (SFE-868) because the file was not captured
AVSREQ-152111 LP_1801 update xrio to include default isolation and no_isolation strategies
AVSREQ-160662 UVM uvm_hdl_force is not forcing properly vhdl variable of enum type
AVSREQ-153911 XPESSIMISM_GENERAL Adding progress bar while Xpessimism analysis is running
AVSREQ-157588 IP_PROTECT_GENERAL Customers need Xcelium20.03s released w/ new IPPLIB
AVSREQ-157768 LP_1801 add support for set_port_attribute s_isolated
AVSREQ-149977 SIM_SV fsdb runtime crash error code -120 (simulator part)
AVSREQ-153813 LP_1801 xmelab: *E,UDFUOBJ: [LPS] No IEEE 1801 object is found for SS_vdd when apply_power_model used
AVSREQ-138799 VPI_GENERAL VPI EXPRWFC error observed from simvision due to function call in expression
AVSREQ-151042 UVM_SV_CDNS_EXTENSIONS uvm hierarchy is not displayed in simvison/indago with UVM-IEEE
AVSREQ-145526 LP_1801 support for define_power_model to accept 'source' or include files
AVSREQ-154875 ELAB_SV_VHDL internal error at elab
AVSREQ-147365 COVERAGE_CODE Clock toggle coverage missing
AVSREQ-160462 VPI_GENERAL rand_2state : n generates wrong results
AVSREQ-155919 SIM_SPARSE_ARRAY Memory Blow up 6.7 Gig to 29 Gig - from 19.01.001 to 21.07.001
AVSREQ-128772 LP_1801 Mean to force the connect_supply_net to use the liberty pg_pin and not the HDL pg_pin
AVSREQ-140835 SIMVISION_SOURCE_BROWSER Enable preview of selected struct fields in SimVision's Source Browser and Schematic Tracer
AVSREQ-160163 SIM_PERFORMANCE INTERR tl_prune_reader - index not found in vlog_cg
AVSREQ-167221 JUPITER_ENGINE Crash in PBBOX execution function
AVSREQ-160000 SPECMAN_TEMPORAL "all of for each" invokes same TCM twice in compiled mode
AVSREQ-150864 XRUN_GENERAL Xcelium cannot parse the command line option with quotation correctly that is followed by -DXXX
AVSREQ-160441 FUNC_SAFETY_CONCURRENT fault is PD in concurrent, DD later in serial
AVSREQ-147790 XPROPAGATION_GENERAL Internal exception when simulating with xprop
AVSREQ-160162 SV_CODEGEN xmvlog_cg INTERR gq_auto_swbwo - not found status, class 529, file: monitor.sv, line: 60
AVSREQ-146415 XPROPAGATION_GENERAL Tool crash with -xprop c option
AVSREQ-71358 PARSE_SV 2154785 CCR parser is not generating an error when reference to a local variable references non-existent object
AVSREQ-160913 SIM_PERFORMANCE Issue with generate statement correlated to -enable_share_aca
AVSREQ-135847 FUNC_SAFETY_CONCURRENT Safety Waveform - dump SHM instead of VCD for fault simulation
AVSREQ-166244 DMS_ELAB testcase passes with 21.07 but crashes with 21.09
AVSREQ-149056 ELAB_SV PCRFON error generated when interface w/ ref port is unused
AVSREQ-161995 LP_VPI Indago crashes when trying to load lwd of lps graphic soc env
AVSREQ-160430 DCP Add environment variable to be use with custom filters files
AVSREQ-161101 PARSE_SV Enhance xmvlog parser to given an error instead of xmelab on hierarchical references from within a package.
AVSREQ-162300 ELAB_SV CUVNAA: error within protected source code.
AVSREQ-155799 RAND_SOLVER Crash on latest agile releases, with clones generated for a randomization testcase
AVSREQ-155480 XPROPAGATION_GENERAL Xprop couldn't handle over 9 don't care (?) case statement condition
AVSREQ-107218 SIMVISION_GENERAL Mnemonic map is not applicable to the 'real' type in Xcelium, but it used to work in Incisive 13.2
AVSREQ-157833 MSIE_PERFORMANCE Port level support/reference in manualy created HREF
AVSREQ-166935 SV_INTERFACE Elab crash when debugging an issue
AVSREQ-163774 JUPITER_COMPILER MC_RTL_CUST: South crash in "RemoveRedundantRegWritersSouth" in customer test with -mce_rtl
AVSREQ-153741 MSIE_ELAB MSIE errors MULVLG and CUVMUR
AVSREQ-155340 SIM_PERFORMANCE xmsim *F,INTERR anonymous continuous assignment with 21.03.v004 newperf and real type
AVSREQ-158664 SIM_PERFORMANCE enable_var_opt_core causing assertion error
AVSREQ-162752 SIMVISION_MS .svmspart.info generated even if ams_edb disabled
AVSREQ-99631 SIMVISION_LOW_POWER Sending an Object to the Schematic Tracer should result in a focused but clear view
AVSREQ-143318 SV_INTERFACE sv_seghandler - trapno -1 addr((nil)) on 20.12 patch
AVSREQ-161749 VPI_GENERAL Need a way to downgrade timestamp check error from save/restart to a warning
AVSREQ-161912 LP_1801 Two separate always-statements have same structure, but only one shows the correct output value
AVSREQ-156318 ELAB_BIND Re-enable "-relax_svbmuf" along with "-relax_svbtis"
AVSREQ-163823 DMS_ELAB xmelab INTERR w/ Spice model
AVSREQ-153595 PARSE_SV INTERR: Missing Functionality
AVSREQ-159112 LP_1801 Lot of signals dropped isolation, where CLP places. Need to fix all those
AVSREQ-100732 DMS_BIND bind on vams improvements need to avoid lost electrical connection or crash
AVSREQ-158703 SIM_PERFORMANCE Different behaviour between r/rw
AVSREQ-158771 ELAB_BIND Enable -configwarn support for protected design
AVSREQ-152843 DMS_ELAB DMS IE Operation Fails with cds_rnm_packge::* types
AVSREQ-158290 ELAB_SV Xcelium Crashing for customer during Elaboration for axi combatibilty Migration
AVSREQ-154024 ELAB_PERF 2-4x increase in elaboration time when switching from 19.12a to 20.11a
AVSREQ-149461 COVERAGE_PERFORMANCE Toggle coverage is getting affected because of set_optimize -newperf
AVSREQ-163616 DMS_ELAB xmelab *F INTERNAL EXCEPTION sss_hname - can't find AOI index (looks like AVSREQ-154490)
AVSREQ-156111 COVERAGE_FSM FSM coverage is not extracted for synchronous state-machine
AVSREQ-158575 GLS_GENERAL Weird behavior of XCELIUM
AVSREQ-157989 LP_1801 [LPS] Xcelium can't insert isolation cell with -lps_iso_netsplit
AVSREQ-155280 SPECMAN_COV Using multiple item options in a cover item - only the last one is obeyed.
AVSREQ-154005 LP_1801 Add_state_transition if used with UPF2.1 version throwing an error xmelab:*E,UPFERRM
AVSREQ-95465 ELAB_SV Elab error when $fatal() call is made with no arguments.
AVSREQ-158169 SIMVISION_MS Improve current browser to allow extracted currents on custom depth
AVSREQ-153088 LP_1801 Add support for "retention_condition" in query_retention command
AVSREQ-148887 GLS_GENERAL Unexpected X in gatesim
AVSREQ-95127 SIMVISION_SCHEMATIC sending signal to schematic does not highlight the signal and zooms off
AVSREQ-154084 ASSERTION_PERFORMANCE Enable pruning of procsva eval blocks
AVSREQ-158479 ELAB_CLONE Elab crash when using -xmclone on large customer design
AVSREQ-92142 SV_INTERFACE CUINMD not clear for auto-instantiated top modules
AVSREQ-102587 COVERAGE_CODE branch coverage instrumented even with pragma coverage off
AVSREQ-160368 JUPITER_BRIDGE Performance optimisation during initialization in highly replicated design(MSIE)
AVSREQ-156123 SIM_SV sim results are different when not probing on Xcelium
AVSREQ-157226 ASSERTION_SIM Issues with -enable_abv_asrtctrl_enh in GREEN
AVSREQ-157550 SV_PERFORMANCE XLM lags 2x for this testcase. Profile points to TB/SV. Need to fix.
AVSREQ-153696 DMS_ELAB SIEDTM error using scalar connections(x) to SIE Input port specified as wire [0:0] x
AVSREQ-158216 JUPITER_BRIDGE MC_RTL_CUST: Elaboration crash in MCGFE in cu_jupiter_wait_for_mcgfe: mcgfe_cg
AVSREQ-159233 PARSE_SV xmvlog compile time hang in verilog
AVSREQ-161845 DEBUG_DESIGN_DATABASE SIMVISION: Schematic Window not showing internal connection in 21.09 but showing in 20.09
AVSREQ-157741 SV_CODEGEN xmelab Internal Error : gq_e_conditional - datatype default (853)
AVSREQ-140823 LP_1801 UPF find_objects does not find SystemVerilog interfaces
AVSREQ-160084 XRUN_JASPER Remove "-disable_auto_bbox" from default JasperGold UNR flow
AVSREQ-149302 SV_INTERFACE SV interface not working as expected on NLP sim
AVSREQ-161489 SIMVISION_GENERAL xmbrowse does not support Soft Error
AVSREQ-154378 GLS_GENERAL Add start and stop time for X debugging on TRANs
AVSREQ-157429 RAND_GENERAL WIF/BDD solver generates different results with apparently the same inputs
AVSREQ-155708 DEBUG_PROBE Hierarchical Probing during Interactive debugging of a particular instance taking longer time
AVSREQ-153593 PARSE_SV INTERR: Missing Functionality
AVSREQ-93603 XRUN_GENERAL Add an option to not read in a cds.lib/hdl.var file if one exists in the search path
AVSREQ-135629 GLS_GENERAL enable the internal arc simulation in Xcelium (MPDNOI )
AVSREQ-141550 SV_CODEGEN crash after simulation finished while trying to collect/dump coverage data
AVSREQ-129877 COVERAGE_CODE Please add unlimited hit count limit for block coverage
AVSREQ-157601 LP_1801 signal getting delayed by 15ns even when no logic in between the source and destination
AVSREQ-160491 GLS_SDF wor not fulfilled when using annotating INTERCONNECT on connected pad
AVSREQ-151203 JUPITER_BRIDGE JUP_ACC_NACC_LOGS_SVA: Clearly dump NACC SVA reasons in ACC NACC logs and remove redundancy
AVSREQ-162359 LP_1801 Need to improve build performance.
AVSREQ-152099 PARSE_SV xrun not generating hdl.var when -v option is used
AVSREQ-163625 SIM_PERFORMANCE xmsim INTERR w/ coverage dump in LP sim
AVSREQ-99994 SIMVISION_SCHEMATIC tracing driver in schematic goes into oblivion
AVSREQ-163293 DMS_INTERACTIVE First-field visualization for struct UDNs does not work with coerced nets
AVSREQ-153917 XPESSIMISM_GENERAL Remove `ifdef DEPOSIT from correction file
AVSREQ-100818 LP_1801 lps_cov : always_trigger does mess the lps_atime scheme up
AVSREQ-155303 LP_1801 Indago doesn't show correct power information
AVSREQ-151079 DMS_SVAMS INTERR with amsd - on design using SV-UDN and logic connectmodules(DMS IEs)
AVSREQ-163677 LP_1801 timing difference in 4 parallel nands
AVSREQ-157765 LP_1801 hierarchical pattern -object_type port in find_objects is broken
AVSREQ-158912 LP_1801 ILROPR warning cause to wrong behavior
AVSREQ-155239 DEBUG_DESIGN_DATABASE Enhanced LWD: Support loading libsagegen.so by Env setting
AVSREQ-154033 COVERAGE_PERFORMANCE Enabling coverage makes runtime 20x! (and doubles elaboration memory)
AVSREQ-157480 LP_SV wrong behavior of lps processing in always_comb with unique casez
AVSREQ-158522 ELAB_BIND F,SOPARM error at elaboration with -portchecks option
AVSREQ-155320 LP_1801 XRIOSPM message in latest xrio script
AVSREQ-153235 SAVE_RESTART_DMTCP -process_save causing crash in xcelium in emulation run
AVSREQ-99069 DMS_VLOG Support for multiple analog blocks inside a module
AVSREQ-108897 SIMVISION_GENERAL Simvision Reinvoke: expand editable area with window
AVSREQ-159366 SV_DYNAMIC_DATATYPES Unexpected RTSDAD warning on dynamic array creation
AVSREQ-146544 ELAB_SV -parseinfo cuscope should also print the target type name from where its called
AVSREQ-161245 PARSE_SV CUVUNF for package name in constraint
AVSREQ-154728 SV_PERFORMANCE Xcelium not ignoring deadcode in Clocking blocks
AVSREQ-131781 PARSE_SV would like warnings/errors if there exists code at cuscope
AVSREQ-162089 DMS_VLOG DLCIML BDLPAT MACRDF warnings issued even after using nowarn
AVSREQ-129332 DMS_ANALOG_ELAB Connect module interface misbehaving in Xcelium 20.03
AVSREQ-155013 XRUN_GENERAL Getting FST_FILE_LOCATION even though the "previous" and "now" are the same
AVSREQ-163062 SIM_SV output obtained x when inputs are having no read access
AVSREQ-154752 RAND_SOLVER Dist not honored (range and weight rand)
AVSREQ-163710 LP_1801 xmsim: *E,LPSNORL when -lps_cov is used
AVSREQ-158094 SV_GENERAL Nested foreach loop syntax causing functional failure
AVSREQ-154792 DMS_SIM $table_model failed:ERROR(TABMOD-020)
AVSREQ-81507 SV_GENERAL UVM analysis port doesn't support SV struct
AVSREQ-162364 DEBUG_DESIGN_DATABASE Wrong scope declaration.name and GUI type for UDP
AVSREQ-159867 SIM_SPARSE_ARRAY Major slowdown when dumping MDA between 20.12.t002 and 21.03.v003
AVSREQ-134899 COVERAGE_TOGGLE Smart refinement does not propagate from verilog vector to vhdl std_logic_vector
AVSREQ-159107 LP_1801 lp crash sv_seghandler_aux
AVSREQ-79885 SIMVISION_SCHEMATIC modport representation missing label
AVSREQ-91393 PARSE_SV DUPIDN shows incorrect include path
AVSREQ-157759 LP_1801 Wrong UPF_GENERIC_OUTPUT for part select connection and one bit isolation
AVSREQ-159039 LP_1801 NOISOIO messages for IO ports with set_isolation -no_isolation (XRIO 1.27)
AVSREQ-160233 LP_1801 vcorr_opt with coverage casue q-flop to not get value
AVSREQ-164049 LP_1801 Tool crash during elaboration after adding -lps_power_tchecks
AVSREQ-151957 SV_DPI xmsim: *E,IMPDLL: Unable to load the implicit shared object. OSDLERROR: (null)/test/sv/_sv_export.so: cant open shared object file: No such file or directory or file is not valid ELFCLASS64 library.. xmsim: *F,NOFDPI: Function __DPISC__...
AVSREQ-145222 SIMVISION_MS Customer requests a built-in symbol for 5 and 6 terminal mosfets
AVSREQ-159432 COVERAGE_CODE Need help explaining expression coverage results
AVSREQ-152953 FUNC_SAFETY_ELAB fault_exclude doesn't work
AVSREQ-159323 PARSE_SV xmvlog crashed with MESSAGE: smi_get_source_marker
AVSREQ-155139 MSIE_ELAB $xm_force not marking genhref T permission causing HREFAC/HREFUP/Primary reelaboration without access w permission
AVSREQ-157648 SAVE_RESTART_DMTCP simvisargs prevents simulator gui opening
AVSREQ-158926 XRUN_GENERAL *F, WKNOLK Failed to get a Shared lock
AVSREQ-163701 DMS_ELAB xmelab internal error during discipline resolution in digIs_merge_islands ()
AVSREQ-167863 DMS_ELAB Xmelab crash with 21.09-s007
AVSREQ-159325 LP_1801 support of special LS-ISO combo cell with 2 outputs
AVSREQ-142654 DMS_SVAMS Xcelium-only MS Sims creating a new dependency on Spectre via scs file
AVSREQ-155166 LP_1801 lps_cov is broken
AVSREQ-100882 ASSERTION_PSL Failing PSL assertion does not stop interactive simulation
AVSREQ-153098 FUNC_SAFETY_CONCURRENT Different result in Serial and Concurrent when using 21.06.a001.
AVSREQ-130903 XPROPAGATION_GENERAL Please add Summary Report for VHDL in xp_elab.log
AVSREQ-162363 DEBUG_DESIGN_DATABASE Wrong scope declaration.name and GUI type for UDP
AVSREQ-154070 MSIE_ELAB MSIE : multiple fanout check in hierarchical signal connection


===============================
CCRID Product Title
-------- ------------ ---------------------------
JIRA ID COMPONENT SUMMARY
AVSREQ-162005 LP_1801 What are possible reasons when "set_isolation -source" filters ports that are driven by the given source?
AVSREQ-167751 SIMVISION_DB_UTIL When exporting PSFXL databases to CSV format using simvisdbutil, simvisdbutil randomly gets stuck.
AVSREQ-169320 LP_ISOLATION Xcelium isolation insertion w/ -applies_to_boundary
AVSREQ-171379 SIMVISION_MS Current browser shows No Value Available
AVSREQ-164064 LP_1801 Weird b2b isolations w/ one on input of PA
AVSREQ-167452 XPROPAGATION_GENERAL signal does not wake up (x-> 0) even during the power on stage
AVSREQ-172099 DMS_AMSD xmvlog_cg crash with message gq_daca_metrics - vsp switch
AVSREQ-170115 SIMVISION_LOW_POWER Power switch missing in PSN when using for loop
AVSREQ-171104 SPECTRE_AMSD Fatal error with spectre using string concatenation in $cgav in analog context
AVSREQ-164598 SIMVISION_MS Sorting and Display Count not working properly in SimVision MS Currents Browser
AVSREQ-164533 SIMVISION_MS TCL current probe doesn't show current immediately in Design Browser and Waveform Browser
AVSREQ-146768 SIMVISION_MS Design Browser: Need Show/Hide button in Design Browser Sidebar


==============================
CCRID Product Title
-------- ------------ ---------------------------
AVSREQ-160770 LP_DOC callback objects are not updated when declared in UVM env.
AVSREQ-167933 LP_1801 In Low Power Zero delay simulation (with UPF), AND logic is not behaving correctly after power -domain off->ON case.
AVSREQ-164631 LP_1801 AND gate behavior is incorrect
AVSREQ-171735 LP_1801 ASRTST failure due to -ENABLE_LPS_WSHARE_OPT switch
AVSREQ-178622 DMS_ELAB Improve CMINHD messages with instances location
AVSREQ-175828 LP_SIM_PERF "Power On Reset" Functionality Issue
AVSREQ-177197 SIMVISION_GENERAL It takes time till simvision is up. It looks for Indago_VB_SV Feature.
AVSREQ-178500 LP_1801 Xcelium behavior is wrong when using UPF.
AVSREQ-176380 SIM_SV_VHDL Issue with dynamic array of struct from SV to vhdl
AVSREQ-176408 IP_PROTECT_GENERAL xmprotect to be able to encrypt a gate-level netlist (.vg from vhelab) that includes a mix of encrypted and unencrypted RTL content
AVSREQ-175446 IP_PROTECT_GENERAL xmprotect: *E,ENCERR: (test.vhd,0) Error during encryption. invalid or unknown or incomplete pragma specification '-pragma protect begin'.
JIRA ID COMPONENT SUMMARY
AVSREQ-173881 SIMVISION_MS AMSD mixed-signal activity stats reports different number of events compared to Mixed Net browser
AVSREQ-177705 SV_PARAMETERS xmelab INTERR sv_seghandler when automatic function passed localparam that matches input size declared
AVSREQ-175500 ASSERTION_SVF xmvlog: *F,INTERR: INTERNAL EXCEPTION
AVSREQ-178255 SV_CODEGEN csi-xmvlog_cg - CSI: *F,INTERR: INTERNAL EXCEPTION
AVSREQ-177055 SPECTRE_AMSD analog publishing issue with Spectre terminals when running AXUM flow
AVSREQ-179392 LP_SV const SV struct gets corrupted
AVSREQ-177400 RAND_GENERAL csi-xmsim - CSI: *F,INTERR: INTERNAL EXCEPTION
AVSREQ-171570 ASSERTION_SVF [Xcelium]Using "$past" in a "$display" statement [xmvlog:*F,INTERR]
AVSREQ-179013 SPECTRE_AMSD memory leak in AMS
AVSREQ-179487 LP_1801 Gated clock library outputs "x"
AVSREQ-179424 GLS_PERFORMANCE huge elaboration overhead when moving from ZD to SDF simulations
AVSREQ-175391 COVERAGE_DOC set_optimize -vlog_prune_on code example does not match description


============================
CCRID Product Title
-------- ------------ ---------------------------
JIRA ID COMPONENT SUMMARY
AVSREQ-181151 SPECTRE_AMSD dna_assembler always prints message saying using an old version of Spectre
AVSREQ-176513 SPECTRE_AMSD top level node connecting to lower hierarchy via inherited connection is not saved in spectre.ic and spectre.fc
AVSREQ-161501 SIMVISION_MS Add a way to display only analog or only digital signal object in design browser
AVSREQ-180556 DMS_ELAB crash during elaboration with message "vst_name() - invalid class, class 749"
AVSREQ-176408 IP_PROTECT_GENERAL xmprotect to be able to encrypt a gate-level netlist (.vg from vhelab) that includes a mix of encrypted and unencrypted RTL content
AVSREQ-179060 SIMVISION_SIGNAL_TRACING Need a utility to filter currents and voltage above or below a certain threshold in SimVision measurement window
AVSREQ-178178 VSP_SIMULATION Exception error/crash while dumping the Profile report in NBRUN mode
AVSREQ-180911 DMS_ELAB FATAL: Segmentation fault during elaboration phase
AVSREQ-179013 SPECTRE_AMSD memory leak in AMS
AVSREQ-179424 GLS_PERFORMANCE huge elaboration overhead when moving from ZD to SDF simulations


==============================
CCRID Product Title
-------- ------------ ---------------------------
JIRA ID COMPONENT SUMMARY
AVSREQ-102421 DMS_ELAB Example of using $SIE_input not behaving as expected
AVSREQ-182179 SIMVISION_GENERAL HELPAPI-007: tag is not in tag file
AVSREQ-180990 DEBUG_PROBE Integrate the fix in AVSREQ-169242 in Xcelium 22.03 release
AVSREQ-180448 SPECTRE_AMSD Enhance connect modules to allow different delay for a rising and a falling edge
AVSREQ-176380 SIM_SV_VHDL Issue with dynamic array of struct from SV to vhdl
AVSREQ-180630 IP_PROTECT_GENERAL AUTOPROTECT adding unwanted ' \ ' when encrypting macro in included file
AVSREQ-179712 VPI_PLI VPI error - Unexpected VST of type 738 in internal PLI routine ipi_findHandleInExpression.
AVSREQ-183268 SIMVISION_CONSOLE Simvision scope command error with hierarchical path having a special character
AVSREQ-175873 SIMVISION_CONSOLE [Xcelium][SimVision] "invalid command name "0" error on "SimVision>scope show top.\X[0]".


======================================
CCRID Product Title
-------- ------------ ---------------------------
JIRA ID COMPONENT SUMMARY
AVSREQ-171819 SIM_VHDL TRINDXC error
AVSREQ-180630 IP_PROTECT_GENERAL AUTOPROTECT adding unwanted ' \ ' when encrypting macro in included file
AVSREQ-180455 DMS_CONNECT_MOD timescale directives missing on all three EEnet_2_E IEs in the xcelium connect_lib
AVSREQ-180567 VPI_LWD Indago Missing connection from the parent scope
AVSREQ-181743 VPI_GENERAL Incorrect object returned for textRef to a ref object in UVM
AVSREQ-183485 IP_PROTECT_GENERAL GCC9 IPPLIB library issue